Electronic design automation (EDA) tools are often used to generate a detailed design of a semiconductor circuit. Computer-implemented tools such as computer-aided design (CAD) tools are often used to carry out the design flow. Many of the operations may be implemented as software running on computer servers and/or workstations.
A typical digital design flow may involve generating a system specification that provides design parameters for the semiconductor circuit to one or more of the EDA tools. A circuit implementing the system specification may then be generated manually or automatically (such as by using ready-made IP functions). In conventional design flows, the circuit may be entered by a hardware description language (such as Verilog, VHDL, or any other hardware description language (HDL)). The HDL is described in register transfer level (RTL), which specifies the flow of digital signals and hardware logic between hardware registers. In a logic synthesis operation, an abstract form of desired circuit behavior (typically a register transfer level (RTL) description or behavioral description) is turned into a design implementation in terms of logic gates. In a verification operation, the netlist output by the logic synthesis operation is verified for functionality against the circuit design specification. A physical implementation of the netlist may then be performed, including an analysis to verify functionality, timing and performance across predetermined or user-specified ranges of process, voltage, and temperature parameters. While beneficial for integrated circuit design, using HDL to specify hardware circuitry typically involves a relatively low-level of abstraction, such that the designer often needs to employ significant hardware design skills.
Recently, software-based design tools have been developed to enable software programmers to specify untimed programming code, such as C++, to generate production-quality RTL code. The software-based design tools, known as high-level synthesis (HLS) tools, allow a designer to work more productively at a higher level of design abstraction. Further, since hardware is automatically synthesized from the HLS software, designers with little to no “hardware” design skills may still carry out a design flow.
While conventional HLS tools are beneficial in enabling software programmers to design integrated circuit devices with minimal hardware design skills, the usability of existing HLS tools has room for improvement. Accordingly, what is needed are methods, systems and associated apparatus that improve the usability of HLS in a digital design flow.